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Serdes Module

Project description & features:
  • Serdes-M carries two channels of Gigabit Ethernet data on single fiber
  • Consists of two Gigabit SERDES BCM5416S
  • Implements logic which effectively doubles the data rate on existing fiber
  • Implements the transmit logic and control function along with the required data transformation, as per specifications.
  • At receiver, the data stream is analyzed /processed and stored in secondary memory.
Domain:
  • Networking
Tools & technology:
  • FPGA Development – Xilinx Spartan 3 – XC3S400
  • Altium Designer
  • Design Language – VHDL
  • Simulation Tool – Model Sim-XE
  • Throughput Checker – Spirent Smart Bits
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